T&M: Test Challenges in Embedded Chips for Telecom Devices

This current decade is facing proliferation of faster Devices and multi functional implementation on chips.The various functions are being offered by the same Mobile Phones simultaneously.It is a camera,Radio,Social networking platform,Video streaming device besides the basic phone!This can all happen if the embedded chips are having complex architecture on the same Silicon.And before this can be realised it needs to be passing thru Testing/Verification. How and whether we have the right testing approach?

Testing of these complex ICs is done more and more through Software Defined Test or SDT.So the idea is to separate as much as we can the hardware ecosystem of T&M from its Software.Since we want to achieve more and more from the same chip,we hit the physical limits defined by Moores Law (number of transistor doubling every Eighteen Months)the only way out being build the testability at every stage of design and manufacturing!

Since T&M technology has to be smarter and faster than chips under design,the testing challenge is met by NOT resorting to physical devices increase but resorting to use of Multi Core Processors and Programmable Gate arrays,or FPGA.This allows us to use the same IP generated (during Design Stages) to leverage in Manufacturing Testing,concurrently.Separation of hardware and software defined test in T&M is great enabler to design compact multifunctional chips and cheaper Quality and Multifunctional devices: Smartphones,Tablets et al.We can dream of having a Smartphone in less than $50, for instance!

Software defined test ( SDT) is driving these designs of new age smart chips and devices made with them.T&M Services are as usual getting challenged by the user and in turn leveraging new architectures to produce and test them in turn! Interesting Osmosi effect at work!